METHOD FOR CMOS LATCH-UP IMPROVEMENT BY MEV BILLI (BURIED IMPLANTED LAYER FOR LATERAL ISOLATION) PLUS BURIED LAYER IMPLANTATION

摘要

CMOS vertically modulated wells are constructed by using a blanket implant to form a blanket buried layer and then using clustered MeV ion implantation to form a structure having a buried implanted layer for lateral isolation in addition to said blanket buried layer.