An integrated, CMOS, constant-fraction timing discriminator for multichannel detector systems

摘要

An integrated, CMOS, constant-fraction timing discriminator (CFD) that is designed to accommodate the special requirements of large, multichannel detector systems is described. This CFD features on-chip, zero-crossing shaping and an automatic walk setting to limit the number of user adjustments. The circuit is realized in the Orbit 1.2 micron, N-well, CMOS process and operates with a 5 V power supply. The time walk in a 100:1 dynamic range (-15 mV to -1.5 V) is less than /spl plusmn/250 ps for a 10 ns rise time-10 ns fall time signal, yet the power dissipation is about 2 mW/channel. The discriminator has a 170 /spl mu/M pitch, is 800 /spl mu/M long, and is structured for arraying multiple channels on a single die.