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首页> 外文期刊>IEEE Transactions on Nuclear Science >An integrated, CMOS, constant-fraction timing discriminator for multichannel detector systems
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An integrated, CMOS, constant-fraction timing discriminator for multichannel detector systems

机译:适用于多通道检测器系统的集成式CMOS,恒定分数定时鉴别器

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An integrated, CMOS, constant-fraction timing discriminator (CFD) designed to accommodate the special requirements of large, multichannel detector systems is described. This CFD features on-chip, zero-crossing shaping and an automatic walk setting to limit the number of user adjustments. The circuit is realized in the Orbit 1.2 micron, N-well, CMOS process and operates with a 5 V power supply. The time walk in a 100:1 dynamic range (-15 mV to -1.5 V) is less than /spl plusmn/250 ps for a 10 ns rise time/10 ns fall time signal, yet the power dissipation is about 2 mW/channel. The discriminator has a 170 micron pitch, is 800 microns long, and is structured for arraying multiple channels on a single die.
机译:描述了一种集成的CMOS,恒定分数定时鉴别器(CFD),该鉴别器旨在满足大型,多通道检测器系统的特殊要求。该CFD具有片上,过零整形和自动行走设置的功能,以限制用户调整的次数。该电路采用Orbit 1.2微米N阱CMOS工艺实现,并使用5 V电源供电。对于10 ns的上升时间/ 10 ns的下降时间信号,在100:1动态范围(-15 mV至-1.5 V)中的时间步长小于/ spl plusmn / 250 ps,但功耗约为2 mW /渠道。鉴别器的间距为170微米,长为800微米,其结构可在单个芯片上排列多个通道。

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