A two-dimensional device simulator is used to examine the various low-temperature profile design strategies for silicon bipolar transistors. It is found that a relaxed scaling approach offers the best overall results for high speed circuit operation at liquid nitrogen (LN/sub 2/) temperatures. To support these calculations, experimental results which demonstrate that sub-100-ps emitter-coupled-logic circuit (ECL) operation at LN/sub 2/ temperature is achievable are reported. Design tradeoffs are discussed on the basis of the experimental results.
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机译:二维设备模拟器用于检查硅双极型晶体管的各种低温剖面设计策略。已经发现,对于在液氮(LN / sub 2 /)温度下的高速电路操作,一种轻松的缩放方法可提供最佳的总体结果。为了支持这些计算,报告了一些实验结果,这些结果证明了可以在LN / sub 2 /温度下达到100ps以下的发射极耦合逻辑电路(ECL)。在实验结果的基础上讨论了设计折衷方案。
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