首页> 外文会议>International VLSI Multilevel Interconnection Conference(VMIC); 20051004-06; Fremont,CA(US) >Tunable Low-Shear Copper CMP Pads: Purpose-Built Pad Engineering Solutions
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Tunable Low-Shear Copper CMP Pads: Purpose-Built Pad Engineering Solutions

机译:可调节的低剪切铜CMP垫:专用垫工程解决方案

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摘要

Novel design concepts for fabrication of low-shear surface-engineered polymeric pads for Copper (Cu) Chemical Mechanical Planarization (CMP) are presented. Purpose built planarization solutions are realized through systematic applications of these design concepts. It is demonstrated that pad polymeric nano-structure containing small (1-2) hard segments in a soft urethane with molecular regularity results in significantly improved polishing performance. Furthermore, such purpose built pad engineering solutions allow for minimal stress incorporation during the bulk copper removal step. Tribological studies are carried out on blanket and patterned Copper films using these novel pads and comparison is made with state of the art commercial pads (IC 1000, JSR and Politex). Results indicate ⅰ) significant reduction in coefficient of friction (40%) ⅱ) low temperature transients (~1-2℃) ⅲ) large reduction in dishing and erosion (40-60%), ⅳ) significant improvement in topography (60%), ⅴ) reduction in Cu overpolish burden (50%), ⅵ) excellent defect performance, ⅶ) a 10x reduction in process-induced stress thus minimizing stress voids and stress induced electromigration and maintaining low-k integrity. These results indicate that it is possible to extend conventional CMP all the way to the 32 nm technology node by using novel pad engineering concepts.
机译:提出了用于铜(Cu)化学机械平面化(CMP)的低剪切表面工程聚合物垫制造的新颖设计概念。通过这些设计概念的系统应用,可以实现专用的平面化解决方案。已经证明,在具有分子规则性的软质聚氨酯中包含小的(1-2)硬链段的垫聚合物纳米结构可显着改善抛光性能。此外,这种专用的焊盘工程解决方案可在去除大量铜的步骤中将应力并入最小。使用这些新型垫片对毯状和有图案的铜膜进行了摩擦学研究,并与最先进的商用垫片(IC 1000,JSR和Politex)进行了比较。结果表明ⅰ)摩擦系数显着降低(40%)ⅱ)低温瞬变(〜1-2℃)ⅲ)凹陷和腐蚀大幅度降低(40-60%),ⅳ)形貌显着改善(60%) ),ⅴ)减少铜的过度抛光负担(50%),ⅵ)优异的缺陷性能,ⅶ)减少10倍于过程引起的应力,从而将应力空隙和应力引起的电迁移最小化,并保持低k完整性。这些结果表明,通过使用新颖的焊盘工程概念,可以将常规CMP一直扩展到32 nm技术节点。

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