PARALLEL PIPELINE FLOATING-POINT FUZZY PROCESSOR

摘要

This paper presents a hardware implementation for a Parallel Pipeline Floatingpoint Fuzzy Processor (PPFF) which uses Gaussian membership functions in order to represent the membership functions. The processor inputs are the parameters from a Sugeno fuzzy system. These parameters are developed in an off-line phase and are supposed to be known. The processor inputs are represented in single-precision floating-point and all operations are realised in pipeline. The hardware implementation is realised using a H.O.T II Development System.