首页> 外文会议>International conference on solid-state and integrated-circuit technology; 19951024-28; Beijing(CN) >EFFECT OF SPUTTERING TIME AND RF POWER ON THE CURRENT-VOLTAGE CHARACTERISTICS OF AMORPHOUS (UNDOPED) SILICON FILMS DEPOSITED ON CRYSTALLINE SILICON BY RF SPUTTERING
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EFFECT OF SPUTTERING TIME AND RF POWER ON THE CURRENT-VOLTAGE CHARACTERISTICS OF AMORPHOUS (UNDOPED) SILICON FILMS DEPOSITED ON CRYSTALLINE SILICON BY RF SPUTTERING

机译:溅射时间和射频功率对射频溅射沉积在晶体硅上的非晶硅(非掺杂)硅膜电流电压特性的影响

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The samples A, B, C, D, E, and F were fabricated, depositing films of amorphous silicon (a-Si) by RF Sputtering on p-type crystalline silicon (c-Si) substrates, besides the control sample M/S which was free of a-Si. Ohmic contacts to c-Si substrates were obtained by sputter deposition of Al, followed by 15 min. annealing at 500℃ Top Ni contacts were prepared by thermal deposition The room temperature current-voltage (I-V) characteristics of all the samples were measured in the range from -10V to +10V. The experimental data was described by a relation of the form J α V~m with 0.5 < m < 26 under reverse bias and 1.5 < m < 5.7 under forward bias. In the region with m 2, the I-V data also fitted well to Schottky equation which permitted the determination of barrier heights.
机译:制作了样品A,B,C,D,E和F,除了控制样品M / S之外,还通过RF溅射在p型晶体硅(c-Si)衬底上沉积了非晶硅(a-Si)膜。不含a-Si。通过溅射沉积Al,然后15分钟,获得与c-Si衬底的欧姆接触。在500℃下退火通过热沉积制备顶部Ni触点。所有样品的室温电流-电压(I-V)特性均在-10V至+ 10V范围内测量。实验数据通过JαV〜m的关系描述,其中在反向偏置下为0.5 > 2的区域,I-V数据也很好地符合肖特基方程,从而可以确定势垒高度。

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