Pipeline Scheduling with Dual Voltages for Low Power Design

摘要

New portable devices demand for a low power design. Among the various methods reducing the supply voltage is the most effective way to deal with the minimization of power consumption. Also, the impact of low power technique in the high level can be more significant than the lower level. This paper presents a low power pipeline scheduling algorithm with dual voltage. The input to our synthesis algorithm is an unscheduled data flow graph and the goal of our system is to minimize power consumption subject to timing constraint. We use the mobility of each node to find the operation that may be assigned to lower voltage driven operator for energy saving. Experimental results show considerable reduction in the power consumption.