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首页> 外文期刊>IEEE transactions on very large scale integration (VLSI) systems >Leakage-Power-Aware Scheduling With Dual-Threshold Voltage Design
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Leakage-Power-Aware Scheduling With Dual-Threshold Voltage Design

机译:具有双阈值电压设计的漏电意识调度

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摘要

The exponential increase in leakage power and the substantial power-saving opportunities provided by scheduling have made dual-threshold voltage (dual-Vth) an attractive choice for low-leakage-power designs. In this paper, we work under the assumption that functional units (FUs) are allocated after scheduling, and fully explore the solution space of scheduling with dual-Vth operations to optimize the leakage power of the FUs. First, a binding conflict graph (BCG)-based scheduling method is presented to minimize the number of FUs. Second, the BCG-based method is extended to allow scheduling with dual-Vth operation targeting the minimization of leakage power. In timing-constrained scheduling, each operation in the data flow is initialized with low-Vth. Then, starting from an operation schedule with the timing constraint satisfied, we scale the sets of low-Vth operations in the off-critical paths with high-Vth so as to reduce the number of low-Vth FUs without increasing the total delay. Finally, a scheduling method for minimizing the leakage power under both timing and resource constraints is presented. The results of benchmark tests show that the proposed algorithms can reduce the leakage power reported in previous works by 10.2% while maintaining high circuit performance.
机译:泄漏功率的指数级增长和通过调度提供的大量节电机会,使得双阈值电压(dual-Vth)成为低泄漏功率设计的诱人选择。在本文中,我们假设在调度后分配了功能单元(FU),并充分利用双Vth运算探索调度的解决方案空间,以优化FU的泄漏功率。首先,提出了一种基于绑定冲突图(BCG)的调度方法,以最大程度地减少FU的数量。其次,扩展了基于BCG的方法,以实现以双Vth操作为目标的调度,以最小化泄漏功率。在时序受限的调度中,数据流中的每个操作都以低Vth初始化。然后,从满足时序约束的操作计划开始,在具有高Vth的非关键路径中缩放低Vth操作的集合,以减少低Vth FU的数量,而不会增加总延迟。最后,提出了一种在时序和资源约束下最小化泄漏功率的调度方法。基准测试的结果表明,所提出的算法可以在保持较高电路性能的同时将先前工作中报告的泄漏功率降低10.2%。

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  • 作者单位

    School of Information Science and Engineering, East China University of Science and Technology, Shanghai, China;

    School of Information Science and Technology, University of Science and Technology of China, Hefei, China;

    Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan;

    School of Information Science and Technology, University of Science and Technology of China, Hefei, China;

    Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan;

    School of Information Science and Engineering, East China University of Science and Technology, Shanghai, China;

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  • 原文格式 PDF
  • 正文语种 eng
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  • 关键词

    Threshold voltage; Logic gates; Job shop scheduling; Delays; Transistors;

    机译:阈值电压;逻辑门;作业车间调度;延迟;晶体管;

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