Analysis and modelling of patterned wafer nano-topography using multiple linear regression on design GDS and silicon PWG data

摘要

Every nanometer of residual nano-topography (with high spatial frequency fingerprint) that the scannercannot correct during the wafer exposure directly propagates into the focus budget.Process windows are getting tight with a greater and greater contribution of the focus budget. Nanotopographyis highly correlated to the chip layout. As a consequence it shows systematic peaks and valleysshifting locally optimum process conditions. Mean, standard deviations and ranges are not enough tocharacterize it.It is of high importance to know topography maps to identify care areas on silicon with high risks ofdefocus situations . These maps can be measured at any process step using PWG (Patterned Wafer Geometry)tools but could also be predicted with models (see proof of concept ).The first part of this paper deals with the development of scripts to extract and express in multiplesways topography information. Different types of expressions will be shown followed by two use cases relatedto topography description situation: striation detection and slurry choice for CMP. Those two use cases areproofs of concepts showing that data valorization is a path to provide information that can help processengineers to make decisions and save time for defect detection.This paper ends with a deeper exploration of the correlations between chip designs and nanotopographyfrom an image processing point of view (design layout and wafer topography maps). Short-rangeand long-range contributions of layouts are used to model nano-topography through a multiple linear regression of the pre-processed design layers densities (surface and perimeter) and wafer topography which ischaracterized in this work using KLA PWG tooling. The goal being here to predict wafer topography beforesilicon is being processed so that mitigation solutions can be set up.PWG metrology tool can measure a full wafer nano-topography map with pixels size of 100μm*100μmwhich is enough for a focus analysis. Results show that the first model version reaches encouraging figures of0.77 R² for a product layer having a 20nm topography range.