首页> 外文会议>IEEE International Conference on Distributed Computing in Sensor Systems(DCOSS 2007); 20070618-20; Santa Fe,NM(US) >A Simple Statistical Timing Analysis Flow and Its Application to Timing Margin Evaluation
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A Simple Statistical Timing Analysis Flow and Its Application to Timing Margin Evaluation

机译:简单的统计时序分析流程及其在时序裕度评估中的应用

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摘要

The increase of within-die variations and design margins is creating a need for statistical design methods. This paper proposes a simple statistical timing analysis method considering the lot to lot process shifts occurring during production. This method is first validated for 90nm and 65nm processes. Finally, this statistical timing analysis is applied on basic ring oscillators to evaluate the timing margins introduced at the design level by the traditional corner based approach.
机译:芯片内变化和设计裕度的增加正在引起对统计设计方法的需求。本文提出了一种简单的统计时序分析方法,该方法考虑了生产过程中发生的批次间转换。该方法首先针对90nm和65nm工艺进行了验证。最后,这种统计时序分析应用于基本环形振荡器,以评估传统基于角点的方法在设计级别引入的时序裕量。

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