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Software and Hardware Co-Verification Technology Based on Virtual Prototyping of RF Soc

机译:基于RF Soc虚拟样机的软硬件协同验证技术

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Software and hardware co-verification is a validation technology developed with RF SoC technology. The main purpose of the software and hardware co-verification is to verify the function and timing of software and hardware interface of system on chip, to verify the hardware and software design of system on chip, and to develop application software before coming back of the tape-out chip. Software and hardware co-verification can make software engineers come into contact with the hardware design as soon as possible, so that the software development and hardware design can be carried out concurrently. Compared with the traditional serial development model of software developing after hardware, software and hardware co-verification can greatly shorten the development cycle of the whole project. At the same time, software and hardware co-simulation provides the stimulation signal in real system, which has higher reliability compared with the test signal artificially added, so that the accuracy of hardware verification can be greatly improved. The software and hardware co-simulation uses simulation technique to run software on the simulated hardware model. Software and hardware co-simulation can completely simulate the working environment of the final product, and has the comprehensive verification capability for software and hardware system from signal waveform to source code debugging.
机译:软件和硬件协同验证是一种使用RF SoC技术开发的验证技术。软硬件协同验证的主要目的是验证片上系统的软件和硬件接口的功能和时序,验证片上系统的硬件和软件设计,以及在回头之前开发应用软件。出带芯片。软件和硬件的协同验证可以使软件工程师尽快与硬件设计联系,从而可以同时进行软件开发和硬件设计。与传统的硬件开发后的串行开发模式相比,软件和硬件的协同验证可以大大缩短整个项目的开发周期。同时,软硬件协同仿真提供了真实系统中的激励信号,与人工添加的测试信号相比,具有更高的可靠性,可以大大提高硬件验证的准确性。软硬件协同仿真使用仿真技术在仿真的硬件模型上运行软件。软硬件协同仿真可以完全模拟最终产品的工作环境,并具有从信号波形到源代码调试的软硬件系统的全面验证能力。

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