Architecture and circuit design of parallel processing elements for de novo sequence assembly

摘要

In this paper, we purpose a hardware-compatible parallel DNA de novo sequence assembly algorithm. The k-mers and contigs are stored in different processing elements (PE) according to their leading bases, and assembled through exchanging the head/tail information packets between PEs. Unlike conventional de Bruijn graph approaches, our algorithm does not need to save complete graphs, thus it is better for hardware implementation. The PE circuit is implemented. Simulation results show that the solution qualities are comparable to conventional software approaches.