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A high-speed multi-dielectric capacitance-extraction algorithm forMCM interconnects

机译:MCM互连的高速多介电电容提取算法

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The authors report an extension of a stochastic algorithm forcapacitance extraction in complex two- and three-dimensionalmultidielectric structures. The algorithm has applications in the areaof circuit modeling of multichip modules. The extension is in the formof a simple probability rule that depends on the ratio of electricpermittivities across dielectric interfaces. Computational results arepresented for a two-dimensional cross-section of a wire running over adielectric and ground plane. Results are also presented for athree-dimensional interconnect via partially embedded in a dielectricover a ground plane. All computations were performed on a personalcomputer. Execution times were nominally five minutes for statisticalerrors ranging from one to ten percent, depending on dimensionality andvalue of the dielectric constant. An extraction methodology was devisedfor large conductor arrays based on superimposing a geometrical hashinggrid
机译:作者报告了一种随机算法的扩展。 复杂二维和三维中的电容提取 多介电结构。该算法在该领域有应用 多芯片模块的电路建模。扩展名的形式 取决于电比的简单概率规则 介电界面的介电常数。计算结果是 给出了在导线上延伸的导线的二维横截面 介电层和接地层。结果还显示了 通过部分嵌入电介质的三维互连 在地平面上。所有计算均在个人计算机上进行 电脑。执行时间通常为5分钟,以进行统计 误差范围为百分之一到百分之十,具体取决于尺寸和 介电常数的值。设计了一种提取方法 基于叠加几何哈希的大型导体阵列 网格

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