Comparison and Optimization of the Minimum Supply Voltage of Schmitt Trigger Gates versus CMOS Gates under Process Variations

摘要

This paper presents an in-depth discussion of the limitations of operating digital CMOS circuits at minimum supply voltages. Subsequently, Schmitt Trigger based CMOS circuits and their design methodology are discussed which allow the use of minimum supply voltages lower than standard CMOS circuits. Measurements performed on a benchmark circuit implemented in two different process technologies verify the proposed design methodology.