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A Procedural Approach to Automate the Manual Design Process in Analog Integrated Circuit Design

机译:一种在模拟集成电路设计中自动化手动设计过程的程序方法

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This paper presents a novel approach to automating the design of analog integrated circuits: (1) the Expert Design Plan (EDP), a procedural generator, and (2) the EDP Language, a high-level description language for writing an EDP. An EDP is a parameterizable, executable script, which reproduces a designer's course of action when designing a circuit. Thus, an EDP formalizes the design expert's knowledge-based strategy and makes it reusable. Since it is essential that an EDP represents a circuit designers way of thinking and working as close as possible, the designers themselves should be enabled to create the EDP. Therefor, our approach provides a input method through a domain-specific language called EDP Language (EDPL). Using this language is intuitive and requires no special training. In an exemplary implementation of our approach, a common-source amplifier is automatically sized using a set of only 10 instructions. Even in the first usage our EDP approach has appeared to be more efficient than the manual sizing process.
机译:本文提出了一种新颖的方法来自动化模拟集成电路的设计:(1)专家设计计划(EDP),一个程序生成器,以及(2)EDP语言,一种用于编写EDP的高级描述语言。 EDP​​是可参数化的可执行脚本,可重现设计人员在设计电路时的操作过程。因此,EDP使设计专家的基于知识的策略正式化并使其可重用。由于必须让EDP代表电路设计人员尽可能的思维和工作方式,因此应该使设计人员自己能够创建EDP。因此,我们的方法通过称为EDP语言(EDPL)的特定领域语言提供了一种输入方法。使用这种语言很直观,不需要任何特殊培训。在我们的方法的示例性实施中,仅使用一组10条指令来自动调整共源放大器的大小。即使在首次使用时,我们的EDP方法似乎比手动调整大小过程更有效。

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