首页> 外文会议>Fifth annual international wafer-level packaging conference (IWLPC): we'll put all the pieces together! >A BASELINE STUDY ON THE PERFORMANCE OF STENCIL AND SCREEN PRINT PROCESSES FOR WAFER BACKSIDE COATING
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A BASELINE STUDY ON THE PERFORMANCE OF STENCIL AND SCREEN PRINT PROCESSES FOR WAFER BACKSIDE COATING

机译:晶圆背面涂层的钢板和丝网印刷工艺性能的基线研究

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摘要

The application of adhesive materials on the non-active side of silicon wafers can serve as B-staged die attach or provide a protective laser-markable cover layer that safeguards it from damage in dicing. Traditional solder paste stencil printing equipment is a manufacturing system type that can be used to deposit such adhesive coatings on wafers. This paper will report results of dedicated screen and stencil print baseline testing for the wafer backside coating process. Two commercially standard, nonconductive epoxy based materials of quite contrasting rheologies are compared in trials consuming 48 200mm diameter wafers. Deposit thickness planarity across the wafers is a key metric used to evaluate the performance of the coating process. Results of controlled experiments are showing thickness control capability and surface roughness trends achieved by the printing process are presented. This study demonstrates coating coplanarity success accomplishing ±12.5μm @ 6 sigma control down to 30μm cured thickness.
机译:粘合剂材料在硅晶片非活性面上的应用可以用作B级管芯附着,也可以提供可激光打标的保护性覆盖层,以防止切割时损坏。传统的锡膏模版印刷设备是一种制造系统类型,可用于在晶圆上沉积此类粘合剂涂层。本文将报告用于晶圆背面涂层工艺的专用丝网和模板印刷基准测试的结果。在消耗48个200mm直径晶片的试验中,比较了两种流变特性完全相反的商业标准非导电环氧树脂基材料。整个晶片上的沉积物厚度平面度是用于评估涂层工艺性能的关键指标。受控实验的结果显示了厚度控制能力,并提出了通过印刷工艺实现的表面粗糙度趋势。这项研究表明涂层共面性成功实现了±12.5μm@ 6 sigma控制,固化厚度低至30μm。

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