Inter-university Semiconductor Research Center (ISRC) and Department of Electrical and Computer Engineering, Seoul National University, Seoul, 00826, Republic of Korea;
Inter-university Semiconductor Research Center (ISRC) and Department of Electrical and Computer Engineering, Seoul National University, Seoul, 00826, Republic of Korea;
Inter-university Semiconductor Research Center (ISRC) and Department of Electrical and Computer Engineering, Seoul National University, Seoul, 00826, Republic of Korea;
Inter-university Semiconductor Research Center (ISRC) and Department of Electrical and Computer Engineering, Seoul National University, Seoul, 00826, Republic of Korea;
Inter-university Semiconductor Research Center (ISRC) and Department of Electrical and Computer Engineering, Seoul National University, Seoul, 00826, Republic of Korea;
Department of Electrical and Computer Engineering, Ajou University, Suwon, 16499, Republic of Korea;
Inter-university Semiconductor Research Center (ISRC) and Department of Electrical and Computer Engineering, Seoul National University, Seoul, 00826, Republic of Korea;
Logic gates; Capacitance; MOSFET; Hysteresis; Electric potential; Electrostatics;
机译:勘误:负电容场效应晶体管中的表面电势和漏极电流的解析模型
机译:负电容场效应晶体管的表面电势和漏极电流的解析模型
机译:负电容纳米线场效应晶体管变化和铁电层厚度分析
机译:基于静电电位差的完全耗尽负电容场效应晶体管(NCFET)分析
机译:二维二硫化钼负电容场效应晶体管
机译:不同MOS电容的负电容场效应晶体管的比较研究。
机译:负电容场效应晶体管(NCFET)对多核系统的影响