EMERGING SILICON-ON-NOTHING (SON) DEVICES TECHNOLOGY

摘要

In this paper we explain the advantages of very thin layers (in the channel and in the BOX) of the SON transistors. Electrical results are also presented, with gate length down to 38nm, with a conduction channel thickness as thin as 9nm. It is also demonstrated that SON is better suited than bulk for accepting a metallic gate for low-voltage operation due to its intrinsic low threshold voltage. We have integrated mid-gap CoSi_2 metal gate by total gate silicidation on SON transistors with Si-conduction channel thickness down to 5nm. Finally, we will analyse the ITRS'01 CMOS Roadmap and show that SON allows reaching the I_(on)/I_(off) specifications down to the 32nm node and approaching closely those for the 22nm node, that is by far impossible with Bulk.