A tri-mode 802.11 baseband PHY mixed signal integrated circuit in 0.13um CMOS

摘要

A 0.13um CMOS mixed signal 802.11a/b/g baseband PHY IC, with per-packet receive diversity, 802.11h radar/DFS support and an MRC/MIMO coprocessor interface, is described. Required receive C/N is 5dB at 6Mbps, and 20dB at 54Mbps. Residual packet error rate is less than 4% for 54Mbps and 0.1% for 6Mbps link data rates in a 50ns delay spread channel. The 4.75x4.75mm chip, fabricated in 1P7M 0.13um CMOS, has 8M transistors and dissipates under 31mW in sleep, 206mW in Tx, and 362mW in Rx.