Fast floating-point addition without operand conversion

摘要

Addition is the most common arithmetic operation, and it is therefore important that its implementation be fast and efficient. This paper discusses the implementation of addition in the IEEE-754 standard for floating-point arithmetic, which is now the universally accepted standard for such arithmetic. The notation used for the representation of significands in the standard is sign-and-magnitude, in which addition is traditionally a problematic operation; consequently, almost all implementations rely on conversion to and from two's complement notation, in which the additon is much easier. This paper shows that floating-point addition can be carried out in sign-and-magnitude without compromising performance - at a speed that is similar to that with two's fast complement addition but at a smaller cost.