Signed digit (SD) addition is applied to the design of a new floating-point (FLP) multiplication-add fused (MAF) unit. This adaptation, together with the proposed two-step normalisation method, can reduce the three-word-length addition that is required in the conven- tional FLP MAF unit to two-word-length addition. Furthermore, the sign reversion of the intermediate mantissa that requires three-word-length carry propagation in the conventional MAF unit is replaced by only single-word sign detection. These two improvements can enhance the speed of the MAF unit significantly.
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