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Wafer Scale Processing of Plasmonic Nanoslit Arrays in 200mm CMOS Fab Environment

机译:200mm CMOS Fab环境中等离子纳米缝阵列的晶圆级加工

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摘要

Plasmonic nanoslits have great potential for single molecule applications. We report a wafer scale process for these structures using process steps compatible with a standard CMOS fab environment. This process allows a large scale fabrication of designed nanoslits with extremely small gap sizes and lengths tuned to exhibit optical resonances. Moreover, adjacent grating nano-antennas were successfully implemented, generating strong and localized electric fields in the nanoslit. These slits have practical applications in surface enhanced Raman spectroscopy-based molecular sensing and plasmonic tweezers.
机译:等离子体等离子狭缝在单分子应用方面具有巨大潜力。我们使用与标准CMOS晶圆厂环境兼容的工艺步骤报告了这些结构的晶圆级工艺。该工艺允许大规模制造设计的纳米缝隙,其缝隙尺寸和长度都非常小,可调整以显示光学共振。此外,成功地实现了相邻的光栅纳米天线,从而在纳米缝隙中产生了强大的局部电场。这些狭缝在基于表面增强拉曼光谱的分子传感和等离子镊子中具有实际应用。

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  • 会议地点 Honolulu HI(US)
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    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

    Imec, Kapeldreef 75, 3001 Leuven, Belgium;

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  • 正文语种 eng
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  • 入库时间 2022-08-26 14:19:49

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