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A Necessary and Sufficient Timing Assumption for Speed-Independent Circuits

机译:与速度无关的电路的必要和充分的时序假设

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This paper presents a proof that the adversary path timing assumption is both necessary and sufficient for correct SI circuit operation. This assumption requires that the delay of a wire on one branch of a fork be less than the delay through a gate sequence beginning at another branch in the same fork. Both the definition of the timing assumption and the proof build on a general, formal notion of computation given with respect to production rule sets. This underlying framework can be used for a variety of proof efforts or as a basis for defining other useful notions involving asynchronous computation.
机译:本文提供了一个证明,即对手路径时序假设对于正确的SI电路操作既必要又充分。此假设要求导线在分支的一个分支上的延迟小于在同一分支的另一个分支处通过门序列的延迟。时间假设的定义和证明都基于针对生产规则集给出的通用的,正式的计算概念。该基础框架可用于各种证明工作,或用作定义涉及异步计算的其他有用概念的基础。

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