Characterizing Etch Residue Removal From SiLKreg; Low-K ILD Structures Using an Aqueous-Based Single Wafer Cleaning Process

摘要

Popular spin-on varieties of low-K dielectric materials integrated into semiconductor wafer processing includes SiLK®. The most recent formulation of porous SiLK® Y has an average pore size of 1.8 nm. As features continue to decrease and interlayer dielectric (ILD) porosities increase, success in processing these devices demands greater performance and selectivity. For small features (e.g. 130 nm) SEM analysis may be commonly used to identify a preferred process, however, additional tests that include TEM may be done to ensure that the efficacy of the stack has not changed. Selectivity is achieved with a single-wafer cleaning tool platform that delivers, rinses, and disposes chemistry within short times and tolerances. When using GenClean™ SWC 2210 in a Capsule™ tool, removal of metal-impregnated organic residue is shown to be complete at room temperature within 1 min. This paper presents data on a new chemistry having a low viscosity, pH buffering, and a reduced surface tension. Process information, supporting SEMs, and electrical testing are given to prove that cleaning is achieved.