首页> 外文会议>26th European Solid-State Circuits Conference, Sep 19-21, 2000, Stockholm, Sweden >An 8-bit, 1-Gsample/s Folding-Interpolating Analog-to-Digital Converter
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An 8-bit, 1-Gsample/s Folding-Interpolating Analog-to-Digital Converter

机译:一个8位1Gsample / s折叠内插模数转换器

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This paper deals with the design and implementation of an 8-bit, 1-Gsample/s folding-interpolating analog-to-digital converter using a conventional 0.5μm self-aligned, double polysilicon bipolar process with maximum unity gain cutoff frequency f_T of 25GHz. The highspeed and high-resolution A/D converter has applications in direct IF sampling receivers for wideband communications systems. The converter occupies an area of 2.5mmx3.5mm including bonding pads and exhibits a better than 7-bit ENOB with an input signal frequency of 200MHz and at a sampling rate of 1-Gsample/s. The maximum power dissipation of the ADC is 2.5W using a 5V power supply.
机译:本文研究了使用传统的0.5μm自对准双多晶硅双极工艺,最大单位增益截止频率f_T为25GHz的8位,1-Gsample / s折叠内插模数转换器的设计和实现。 。高速,高分辨率A / D转换器已在宽带通信系统的直接IF采样接收器中得到应用。该转换器包括焊盘在内的面积为2.5mmx3.5mm,并具有优于7位的ENOB,输入信号频率为200MHz,采样率为1-Gsample / s。使用5V电源时,ADC的最大功耗为2.5W。

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