首页> 外文会议>2018 55th ACM/ESDA/IEEE Design Automation Conference >Compiler-guided instruction-level clock scheduling for timing speculative processors
【24h】

Compiler-guided instruction-level clock scheduling for timing speculative processors

机译:时序推测处理器的编译器指导的指令级时钟调度

获取原文
获取原文并翻译 | 示例

摘要

Despite the significant promise that circuit-level timing speculation has for enabling operation in marginal conditions, overheads associated with recovery prove to be a serious drawback. We show that fine-grained clock adjustment guided by the compiler can be used to stretch and shrink the clock to maximize benefits of timing speculation and reduce the overheads associated with recovery. We present a formulation for compiler-driven clock scheduling and explore the benefits in several scenarios. Our results show that there are significant opportunities to exploit timing slack when there are appropriate channels for the compiler to select clock period at cycle-level.
机译:尽管电路级时序推测具有在边缘条件下实现工作的巨大希望,但与恢复相关的开销却被证明是一个严重的缺点。我们展示了编译器指导的细粒度时钟调整可用于扩展和缩小时钟,以最大程度地发挥时序推测的优势并减少与恢复相关的开销。我们提出了一种由编译器驱动的时钟调度的公式,并探讨了几种情况下的好处。我们的结果表明,当编译器有适当的通道选择周期级别的时钟周期时,就有大量机会利用时序松弛。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号