High gain analog cell using biasing technique via gate and body terminals

摘要

In this work, a new high performance analog cell is proposed using biasing technique via gate and body terminals. The proposed cell is based on self-cascode topology. The most attractive feature is that body effect is utilized to increase the intrinsic gain and output impedance of the proposed self-cascode cell. Biasing technique via gate and body terminals increases the intrinsic gain of the proposed cell by 17.61dB. The proposed cell has nearly four times higher output impedance than its conventional version. Analytical formulation for output impedance and intrinsic gain parameters of the proposed cell has been derived using small signal analysis. The proposed biasing approach eliminates the requirement of additional bias-voltage generation circuitry. The proposed cell can operate at low power supply voltage of 0.8 V and consumes merely 39nW. SPICE simulation results using 180nm CMOS technology from TSMC are included to prove the unique results. Simulation results are in good agreement with theoretical predictions. The proposed self-cascode cell is particularly suited for biomedical and instrumentation applications requiring low-voltage low-power operation capability where the processing signal frequency is very low. Because of its compact and simple structure it could constitute as an efficient analog VLSI library cell.