Department of Electronics and Communication Engineering, Amrita School of Engineering, Amritapuri, Amrita Vishwa Vidyapeetham, Amrita University, India;
Department of Electronics and Communication Engineering, Amrita School of Engineering, Amritapuri, Amrita Vishwa Vidyapeetham, Amrita University, India;
Logic gates; Standards; Field programmable gate arrays; Built-in self-test; Computer architecture; Circuit faults;
机译:使用LFSR进行VLSI自检的测试序列设计
机译:ECC设计策略使用VLSI技术在可重构设备(FPGA)中的靶向区域优化
机译:CRC 32可重配置的超高吞吐量低延迟VLSI(FPGA)设计架构
机译:ASIC和FPGA中VLSI IC测试可重构LFSR的设计
机译:基于遗传算法的VLSI ASIC和可重构硬件的设计和优化。
机译:生物物理神经扣球爆裂和兴奋动态可重构模拟VLsI
机译:VLSI高性能ASIC的设计,实现和测试,用于提取复杂信号的相位