首页> 外文会议>2017 9th IEEE-GCC Conference and Exhibition >Polarization Engineered Enhancement Mode High Breakdown Voltage GaN CAVET
【24h】

Polarization Engineered Enhancement Mode High Breakdown Voltage GaN CAVET

机译:极化工程增强模式高击穿电压GaN CAVET

获取原文
获取原文并翻译 | 示例
获取外文期刊封面目录资料

摘要

In this work we propose and simulate a polarization engineered enhancement mode current aperture vertical electron transistor (P-CAVET). The novelty of the proposed structure lies in using polarization engineering to achieve enhancement mode operation. The current blocking layer (CBL) of proposed P-CAVET is hybrid in nature and consist of an oxide part and AIN part. Aluminum Nitride (AIN) portion of CBL is used to lift the triangular well existing at AIGaN/GaN interface above the Fermi level, thus achieving the enhancement mode operation. The CBL provides better suppression of vertical leakage which improves the breakdown voltage. The proposed structure does not need any p-type doping either for achieving enhancement mode operation or for forming current blocking layer. A 2-D calibrated simulation study has revealed that the proposed device exhibits a threshold voltage of 3.1V and breakdown voltage improvement of 100% over the conventional device CAVET.
机译:在这项工作中,我们提出并模拟了一个极化工程增强模式电流孔径垂直电子晶体管(P-CAVET)。所提出的结构的新颖性在于使用极化工程来实现增强模式操作。提出的P-CAVET的电流阻挡层(CBL)本质上是混合的,并且由氧化物部分和AIN部分组成。 CBL的氮化铝(AIN)部分用于将存在于AIGaN / GaN界面处的三角阱提升到费米能级以上,从而实现增强模式操作。 CBL可以更好地抑制垂直泄漏,从而改善了击穿电压。所提出的结构不需要任何p型掺杂即可实现增强模式操作或形成电流阻挡层。二维校准仿真研究表明,与常规器件CAVET相比,该器件的阈值电压为3.1V,击穿电压提高了100%。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号