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Structural Go/No-Go test of the TD-ADC for catastrophic faults

机译:TD-ADC灾难性故障的结构通过/不通过测试

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摘要

Nowadays, Analog to Digital Converter (ADC) has become the main block of mixed signal circuits. Hence, testing ADC circuits is of great interest. In this paper, a low cost structural test is developed for the Time Domain ADC (TD-ADC). The TD-ADC consists of a Voltage-to-Time Converter (VTC) and a Vernier Time-to-Digital Converter (Vernier TDC). The circuit under test is used in high energy physics, spectroscopy, medical imaging, radiation sensors, and environmental sensors. It is shown that only two test values are required to detect 98.1% of catastrophic faults in the fault set. The LTSpice simulator on 45nm CMOS model provided from MOSIS was used in the analysis.
机译:如今,模数转换器(ADC)已成为混合信号电路的主要模块。因此,测试ADC电路非常重要。本文针对时域ADC(TD-ADC)开发了一种低成本的结构测试。 TD-ADC由电压时间转换器(VTC)和游标时间数字转换器(Vernier TDC)组成。被测电路用于高能物理,光谱学,医学成像,辐射传感器和环境传感器。结果表明,仅需要两个测试值即可检测出故障集中98.1%的灾难性故障。分析中使用了MOSIS提供的基于45nm CMOS模型的LTSpice仿真器。

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