Faculty of Computer Science, Universitas Indonesia - Depok;
Faculty of Computer Science, Universitas Indonesia - Depok;
Faculty of Computer Science, Universitas Indonesia - Depok;
Faculty of Computer Science, Universitas Indonesia - Depok;
Faculty of Computer Science, Universitas Indonesia - Depok;
Faculty of Computer Science, Universitas Indonesia - Depok;
Faculty of Computer Science, Universitas Indonesia - Depok;
Field programmable gate arrays; Mathematical model; Algorithm design and analysis; Standards; Logic gates; Hardware design languages; Signal processing algorithms;
机译:解决约束满足问题的数字超大规模集成(VLSI)Hopfield神经网络在现场可编程门阵列(FPGA)上的实现
机译:具有鞍形状的布置及其现场可编程门阵列(FPGA)实现的多卷混沌吸引子
机译:SHA3哈希算法在现场可编程门阵列(FPGA)上的高吞吐量实现
机译:在现场可编程门阵列(FPGA)上有效地实现了广义极端学生化偏差(GESD)
机译:音频频谱图在现场可编程门阵列(fpga)上的实时实现。
机译:使用现场可编程门阵列(FPGA)进行气体识别的气体传感器特性和多层感知器(MLP)硬件实现
机译:针对软件定义无线电(SDR)的现场可编程门阵列(FPGA)的过滤和重采样操作的高效实现