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Cu Wire resistance improvement using Mn-based Self-Formed Barriers

机译:使用基于Mn的自形成壁垒提高Cu线电阻

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Cu wire resistance reduction using CVD Mn-based Self-Formed Barrier (SFB) compared to conventional PVD barrier was investigated at 40 and 100nm half pitch (HP). Mn-based SFB leads to both (1) maximum fractional Cu area in the trenches and (2) Cu resistivity reduction at scaled dimensions. This represents a breakthrough for future interconnect scaling. Blanket Cu experiments suggest that the Cu resistivity reduction in the case of Mn-based SFB can be attributed to lower surface scattering at the dielectric/Cu interface. Finally, promising reliability has been demonstrated in 20nm HP single damascene (SD) SiO2 trenches integrated with Mn-based SFB.
机译:与传统的PVD势垒相比,使用CVD Mn基自成型势垒(SFB)降低了铜线电阻,研究了40和100nm半间距(HP)。锰基SFB导致(1)沟槽中最大的Cu分数面积和(2)按比例缩小的Cu电阻率。这代表了未来互连扩展的突破。覆盖铜的实验表明,在基于Mn的SFB情况下,铜电阻率的降低可归因于介电层/铜界面处较低的表面散射。最后,在集成了基于Mn的SFB的20nm HP单镶嵌(SD)SiO2沟槽中已证明了有希望的可靠性。

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