An Optimal Method for Costas Loop Design Based on FPGA

摘要

The Costas Loop is often used to extract the coherent carrier. In this paper, an optimum method is proposed to realize the Costas Loop based on FPGA. Firstly, the Costas Loop is detailed analyzed, and used the simulink tool to model and simulate the Costas Loop, finally, the hardware realization register transmission logic (RTL) principle chart was presented. Under the condition of saving the FPGA resources as much as possible, the experimental result shows that the method has a good performance.