Challenges and solutions for ultra-thin (50 #x03BC;m) silicon using innovative ZoneBOND#x2122; process

摘要

The purpose of this paper is to investigate integration results of 300mm silicon wafers thinned at 80μm down to 50μm using the innovative temporary ZoneBOND™ technology to handle the device during the process flow. A focus on the coating/bonding and thinning process of 80μm and 50μm thick silicon interposers is made. A tape selection study enabled us to identify two separation tapes compatible with varying interposer backside topology as well as the adhesive cleaning chemistries. After the validation of these fundamental processes, we created fully-functional interposers presenting 10×80 μm or 6Χ55μm TSVs. We measured the TTV and deformation through all the thinning and the backside processes. No significant TTV difference has been observed and all steps whatever the interposer type successfully pass the integration process. Finally, in order to increase the process window of the dielectric and TSV CMP, different oxide deposits are tested on 300mm temporary bondings thinned at 80μm or 50μm. This study confirmed that the dielectric deposition process remains one of the most challenging steps of the backside process. It has been observed that the use of hard mask type deposition process does not damage temporary bonding interface whereas TEOS type deposits at 200°C initiate damage at bonding edges which are more significant for 50μm interposer and thicker deposition layers. This work concludes on the process limitations with the use of ZoneBOND™ technology.