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A flash window ADC for DVS-enabled digital controlled DC-DC converters

机译:闪存窗口ADC,用于启用DVS的数字控制DC-DC转换器

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This paper presents the design and implementation of an analog-to-digital converter (ADC) aiming at digital controlled DC-DC converters for dynamic voltage scaling (DVS) applications. A flash window ADC with programmable conversion range is introduced. In order to achieve a reasonable yield with an uncorrected ADC, the offset of the comparator in the ADC is optimized. The proposed ADC is implemented in a standard 0.18 μm CMOS technology and is applied in a 1MHz DVS-enabled Buck converter. Experiment results show that the dynamic scaling voltage range of 1.2V-2.8V is obtained with a window size of 320mV. It has high robustness to the PVT variations compare to the conventional delay-line ADC.
机译:本文介绍了针对用于动态电压缩放(DVS)应用的数字控制DC-DC转换器的模数转换器(ADC)的设计和实现。推出了具有可编程转换范围的闪存窗口ADC。为了在未经校正的ADC情况下获得合理的成品率,需要优化ADC中比较器的失调。拟议的ADC采用标准的0.18μmCMOS技术实现,并应用于支持1MHz DVS的Buck转换器。实验结果表明,在窗口大小为320mV的情况下可获得1.2V至2.8V的动态缩放电压范围。与传统的延迟线ADC相比,它对PVT变化具有很高的鲁棒性。

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