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A test approach of combining partial scan with functional testing for high performance processors

机译:一种将部分扫描与功能测试相结合的高性能处理器的测试方法

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In structural test approach, the design performance would be decreased when the flip-flops in the critical timing paths are replaced with scannable equivalents. For high performance processors design, it could not meet the timing requirement. This paper presents an approach based on the combination of partial scan with functional testing for high performance processors. In this approach, the faults in the critical timing path of design are detected by functional tests, and the rest are detected by partial scan tests. It has no influence on the design performance and can reach high fault coverage. Experimental results of the SuperV DSP show that the fault coverage can reach 98.85%, achieving the goal of the manufacturing testing.
机译:在结构测试方法中,将关键时序路径中的触发器替换为可扫描的等效项会降低设计性能。对于高性能处理器设计,它不能满足时序要求。本文提出了一种基于部分扫描与功能测试相结合的高性能处理器的方法。在这种方法中,设计的关键时序路径中的故障通过功能测试检测,其余部分通过部分扫描测试检测。它对设计性能没有影响,并且可以达到较高的故障覆盖率。 SuperV DSP的实验结果表明,故障覆盖率可以达到98.85%,达到了制造测试的目的。

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