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Molded underfill (MUF) technology for flip chip packages in mobile applications

机译:用于移动应用中倒装芯片封装的模制底部填充(MUF)技术

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摘要

Increased functionality requirements coupled with progressively reducing package size have necessitated the integration of flip chip packages into various baseband and application processor products in mobile platforms. Such products use flip chip technology using traditional capillary underfill (CUF) process on a strip based package which is subsequently over molded to finish the end-product assembly. The growing pricing pressures and competitive landscape in mobile-packaging has made it imperative for assembly subcontractors to drive the flip chip assembly cost down. To achieve this without compromising product reliability requires a fundamental shift in the way these packages are assembled. Molded underfill (MUF) approach offers such unique solution with promising advantages over CUF; such as lower material cost, higher through put and excellent reliability to meet the overall product needs of today''s evolving mobile market; and is discussed in this paper. Capillary Underfill (CUF) has been the cornerstone of today''s flip chip technology in both flip chip BGA and flip chip CSP format. Several advancements in CUF materials and dispense technologies made over years has made CUF the underfill technology of choice for various flip chip applications. However as the need for reducing package assembly cost has grown simultaneously; CUF material and underfill process comes under scrutiny due to higher material cost and slow through put process in the flip chip assembly flow. MUF was explored and found to be a viable lower cost alternative for mobile products by virtue of lower material cost and faster throughput due to batch process operation in strip format. The cost benefit is further complemented by the capability of MUF to enable finer spacing between die-to-die and die-to-passives; as well as smaller keep-out zones to enable reduced die-to-package edge clearance or effectively shrink the overall package size than that with CUF. Use of vacuum assisted molding was a-n-nlso found to be capable to fill very small gap between die and substrate of the order of 50um without voiding concerns. This paper outlines the multidisciplinary effort undertaken to design, develop, and qualify flip chip package with MUF technology for mobile application; which was successfully introduced in high volume production with yields and reliability at parity with an equivalent CUF package. MUF material with fine filler size was chosen from a material screening DOE; and was used in series of test vehicles (TVs) with different package configurations including single die and multi-die flip chip CSP packages. Process and material margin studies were conducted to establish process window for MUF technology with eutectic and Pb-free bump assemblies. Finally MUF technology was intercepted on mobile application processor product with fcTFBGA-12×12 mm sq. package and 7.5×7.5 mm2 die towards a successful introduction into high volume production. MUF challenges as well as known-limitations are also described along with future plan. Further studies are being conducted to characterize and qualify MUF on larger die sizes and/or with finer bump pitches and to establish the process and reliability margins of MUF with the same.
机译:功能需求的增加以及封装尺寸的逐渐减小,已要求将倒装芯片封装集成到移动平台的各种基带和应用处理器产品中。此类产品在带状包装上使用倒装芯片技术,该技术使用传统的毛细管底部填充(CUF)工艺,随后进行过模制以完成最终产品组装。移动包装中日益增长的价格压力和竞争格局使得组装分包商必须降低倒装芯片组装成本。为了在不损害产品可靠性的前提下实现这一目标,需要对这些封装的组装方式进行根本性的改变。模制底部填充(MUF)方法提供了这种独特的解决方案,与CUF相比具有可观的优势;例如更低的材料成本,更高的吞吐量和出色的可靠性,可以满足当今不断发展的移动市场的整体产品需求;并在本文中进行讨论。无论是倒装芯片BGA还是倒装芯片CSP格式,毛细管底部填充(CUF)都是当今倒装芯片技术的基石。多年来在CUF材料和分配技术方面取得的一些进步使CUF成为各种倒装芯片应用的首选底部填充技术。然而,由于减少包装组装成本的需求同时增长。由于较高的材料成本和倒装芯片装配流程中的穿入工艺较慢,因此需要对CUF材料和底部填充工艺进行审查。对MUF进行了探索,发现它是一种可移动的低成本解决方案,因为带状批处理操作可降低材料成本并提高生产效率。 MUF能够在晶粒对晶粒和晶粒对无源材料之间实现更精细的间距,从而进一步弥补了成本优势。以及较小的保留区,以减少芯片到封装的边缘间隙,或有效缩小整体封装尺寸(与CUF相比)。发现使用真空辅助模制可以使模具和基板之间的缝隙很小,间隙约为50um,而不会产生空隙。本文概述了采用MUF技术为移动应用设计,开发和验证倒装芯片封装的多学科工作。该产品已成功引入大批量生产,具有与同等CUF封装相当的产量和可靠性。从填料筛选DOE中选择具有细填料尺寸的MUF材料;并用于具有不同封装配置的一系列测试车辆(TV),包括单芯片和多芯片倒装芯片CSP封装。进行了工艺和材料裕度研究,以建立具有共晶和无铅凸块组件的MUF技术的工艺窗口。最终,MUF技术在采用fcTFBGA-12×12 mm sq。封装和7.5×7.5 mm 2 模具的移动应用处理器产品上被拦截,从而成功地引入了批量生产。 MUF的挑战以及已知的局限性也与未来计划一起进行了描述。正在进行进一步的研究,以在较大的芯片尺寸和/或较小的凸点间距上表征和鉴定MUF,并确定MUF的工艺和可靠性裕度。

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