Comparative Analysis and Design of Two Diverse Realizations for FPGA Based Digital PID Controller Using Xilinx SysGenR

摘要

Digital PID controller is one of the most powerful and efficient controller, which is widely used in industrial and control applications. PID controllers can be implemented through microprocessors (mierocontrollers) and FPGA. The microprocessor based PID controllers are inefficient in terms of speed. However, FPGA based PID controllers are more advantageous in terms of speed and power consumption as compared to microprocessor based PID controllers . Here we design two diverse realizations of FPGA based digital PID controller. One realization is multiplier based which needs multipliers for its implementation and other realization is multiplierless, which is implemented through Distributed Arithmetic Look Up Table (DALUT) method. Distributed arithmetic is an efficient technique to compute inner products using Look Up Tables (LUT). DALUT based PID controller is more efficient because it utilizes less power and hardware resources. Both realizations are simulated in Matlab/Simulink environment. Xilinx SysGen is used to translate both the realizations to bit stream and then downloaded to the target FPGA using Xilinx ISE Project Navigator. Xilinx SysGen is also used to estimate the hardware resources to be utilized for FPGA implementation. The results obtained are very helpful for comparative analysis of both the realizations..