首页> 外文会议>2004 4th International Conference on Microwave and Millimeter Wave Technology Proceedings >HIGH-PERFORMANCE EDGE-SUSPENDED SPIRAL INDUCTORS AND CPWS ON CMOS-GRADE SILICON SUBSTRATES
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HIGH-PERFORMANCE EDGE-SUSPENDED SPIRAL INDUCTORS AND CPWS ON CMOS-GRADE SILICON SUBSTRATES

机译:CMOS硅基片上的高性能边缘悬浮螺旋电感器和CPWS

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摘要

This paper reports high performance edge-suspended passive components realized by CMOS-compatible micromachining. The operation principle is described in detail. Edge-suspended inductors (ESIs) and CPWs (ESCPWs) are fabricated using a combination of deep dry etching and anisotropic wet etching techniques. For a three-turn 4.5-nH inductor, a 70% increase (from 6.8 to 11.7) in maximum Q-factor and a 57% increase (from 9.1 GHz to 14.3 GHz) in self-resonance frequency are obtained with a 11 μm suspended edge in 25 μm wide lines. A 50 Ω CPW exhibits a reduction in insertion loss, from 2.4dB/mm to 0.4dB/mm at 39 GHz.
机译:本文报告了通过兼容CMOS的微加工实现的高性能边缘悬浮无源组件。详细说明其工作原理。边缘悬浮电感器(ESI)和CPW(ESCPW)是结合使用深干蚀刻和各向异性湿蚀刻技术制造的。对于三匝4.5 nH电感器,在悬挂11μm的情况下,最大Q因子增加了70%(从6.8到11.7),自谐振频率增加了57%(从9.1 GHz到14.3 GHz)。边缘的宽度为25μm。 50ΩCPW的插入损耗在39 GHz时从2.4dB / mm降低到0.4dB / mm。

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