A VLSI design for universal Reed-Solomon erasure decoder

摘要

In this paper we present an encoding and decoding algorithm of universal Reed-Solomon codes for erasure decoding. It is shown that the algorithms can be implemented with simple, regular and modular circuits, naturally suitable for VLSI design. A typical example shows that the signal processing speed is in the order of Gbits/second and the processing delay is less than one millisecond, by the use of the decoders on a single chip. Here the "universal" means that the same code and the same circuit design can be used for different code parameters, such as code length and code rate. Therefore, it can be utilized for different applications to recover lost message.