首页> 外国专利> Component Carrier With Blind Hole Filled With An Electrically Conductive Medium And Fulfilling A Minimum Thickness Design Rule

Component Carrier With Blind Hole Filled With An Electrically Conductive Medium And Fulfilling A Minimum Thickness Design Rule

机译:带有盲孔的组件载体,盲孔填充导电介质,并满足最小厚度设计规则

摘要

A component carrier with a stack including an electrically insulating layer structure and an electrically insulating structure has a tapering blind hole formed in the stack and an electrically conductive plating layer extending along at least part of a horizontal surface of the stack outside of the blind hole and along at least part of a surface of the blind hole. A minimum thickness of the plating layer at a bottom of the blind hole is at least 8 μm. A demarcation surface of the plating layer in the blind hole and facing away from the stack extends laterally outwardly from the bottom of the blind hole towards a lateral indentation and extends laterally inwardly from the indentation up to an outer end of the blind hole. An electrically conductive structure fills at least part of a volume between the plating layer and an exterior of the blind hole.
机译:一种具有包括电绝缘层结构和电绝缘结构的叠层的组件载体,其具有在叠层中形成的锥形盲孔和沿着所述盲孔外部的叠层的水平表面的至少一部分以及沿着所述盲孔的表面的至少一部分延伸的导电镀层。盲孔底部电镀层的最小厚度至少为8μm。盲孔中的电镀层的分界面朝向远离堆叠的方向,从盲孔底部横向向外延伸至横向压痕,并从压痕横向向内延伸至盲孔的外端。导电结构填充电镀层和盲孔外部之间体积的至少一部分。

著录项

  • 公开/公告号US2022095457A1

    专利类型

  • 公开/公告日2022-03-24

    原文格式PDF

  • 申请/专利权人 AT&S (CHINA) CO. LTD.;

    申请/专利号US202117457681

  • 发明设计人 MIKAEL TUOMINEN;

    申请日2021-12-06

  • 分类号H05K1/11;H05K3;H05K3/42;

  • 国家 US

  • 入库时间 2022-08-25 00:03:01

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