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TIMING SKEW MISMATCH CALIBRATION FOR TIME INTERLEAVED ANALOG TO DIGITAL CONVERTERS
TIMING SKEW MISMATCH CALIBRATION FOR TIME INTERLEAVED ANALOG TO DIGITAL CONVERTERS
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机译:定时偏斜时间与数字转换器的时间交错模拟的失配校准
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摘要
A time-interleaved analog to digital converter (TI-ADC) includes a first sub-ADC configured to sample and convert an input analog signal to generate a first digital signal and a second sub-ADC configured to sample and convert said input analog signal to generate a second digital signal. Sampling by the second sub-ADC occurs with a time skew mismatch. A multiplexor interleaves the first and second digital signals to generate a third digital signal. A time skew mismatch error determination circuit processes the first and second digital signals to generate a time error corresponding to the time skew mismatch. A slope value of said third digital signal is determined and multiplied by the time error to generate a signal error. The signal error is summed with the third digital signal to generate a digital output signal which eliminates the error due to the time skew mismatch. This correction is performed in real time.
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