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OVERLAY ALIGNMENT MARK, METHOD FOR MEASURING OVERLAY ERROR, AND METHOD FOR OVERLAY ALIGNMENT

机译:覆盖对齐标记,测量覆盖错误的方法,以及覆盖对齐方法

摘要

An overlay alignment mark, a method for measuring overlay error, and a method for overlay alignment are provided in the embodiments of the present disclosure. the overlay alignment mark is formed on a wafer to be detected and comprises a first pattern and a second pattern, the first pattern being located in a first layer of the wafer and comprising two first solid sub-patterns which are provided opposite to each other in a first direction and extend in a second direction perpendicular to the first direction, respectively, and the second pattern being located in a second layer above the first layer of the wafer and comprising two first hollowed sub-patterns which are provided opposite to each other in the first direction and two to second hollowed sub-patterns which are provided opposite to each other in the second direction; and two opposite side edges of each of the two first solid sub-patterns extending in the second direction are at least partially exposed from a respective one of the two first hollowed sub-patterns.
机译:在本公开的实施例中提供了一种覆盖对准标记,用于测量覆盖误差的方法以及用于覆盖对准的方法。覆盖对准标记形成在待检测的晶片上并且包括第一图案和第二图案,第一图案位于晶片的第一层中并且包括两个第一固体子图案,它们彼此相对地提供第一方向并分别在垂直于第一方向的第二方向上延伸,第二图案位于晶片的第一层上方的第二层中并且包括两个彼此相对地提供的第一中​​空的子图案第一方向和两个到第二空心的子图案,其在第二方向上彼此相对地提供;并且在第二方向上延伸的两个第一固体子图中的每一个的两个相对的侧边缘至少部分地从两个第一中空的子图案中的相应中的一个暴露。

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