首页> 外国专利> III-V COMPOUND SEMICONDUCTOR DIES WITH STRESS-TREATED INACTIVE SURFACES AND MANUFACTURING METHODS THEREOF

III-V COMPOUND SEMICONDUCTOR DIES WITH STRESS-TREATED INACTIVE SURFACES AND MANUFACTURING METHODS THEREOF

机译:III-V化合物半导体模具具有应力处理的无效表面及其制造方法

摘要

Before a semiconductor die of a brittle III-V compound semiconductor is encapsulated with a molding compound during package fabrication, side surfaces of the semiconductor die are treated to avoid or prevent surface imperfections from propagating and fracturing the crystal structure of the substrate of the III-V compound semiconductor under the stresses applied as the molding compound solidifies. Surfaces are treated to form a passivation layer, which may be a passivated layer of the substrate or a passivation material on the substrate. In a passivated layer, imperfections of an external layer are transformed to be less susceptible to fracture. Passivation material, such as a poly-crystalline layer on the substrate surface, diffuses stresses that are applied by the molding compound. Semiconductor dies in flip-chip and wire-bond chip packages with treated side surfaces as disclosed have a reduced incidence of failure caused by die fracturing.
机译:在封装制造期间用模制化合物包封的半导体管芯之前,处理半导体管芯的侧表面以避免或防止表面缺陷传播和压裂III的基板的晶体结构。 v在施加的应力下的v化合物半导体作为模塑化合物固化。 处理表面以形成钝化层,其可以是基板的钝化层或基板上的钝化材料。 在钝化层中,转化外层的缺陷以不易骨折。 钝化材料,例如基板表面上的聚结晶层,扩散由模塑化合物施加的应力。 如所公开的,具有处理侧表面的倒装芯片和引线粘合芯片封装中的半导体模具具有减少的模具压裂引起的失效发生率降低。

著录项

  • 公开/公告号WO2021225818A1

    专利类型

  • 公开/公告日2021-11-11

    原文格式PDF

  • 申请/专利权人 QUALCOMM INCORPORATED;

    申请/专利号WO2021US29200

  • 发明设计人 TAO GENGMING;YANG BIN;LI XIA;

    申请日2021-04-26

  • 分类号H01L21/683;H01L23/29;H01L23/31;

  • 国家 US

  • 入库时间 2022-08-24 22:29:23

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