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Static random access memory block and receive sensor with input data adder

机译:静态随机存取存储器块和带输入数据加法器的接收传感器

摘要

The present invention includes a memory cell array (21), a row address decoder (22), a column data multiplexer (23), a read write module (24) including a read amplifier and a write driver, and a control logic unit (25); The present invention relates to a static random access memory block (20) for receiving sensors, including data inlet (26) and data outlet (27).The static random access memory block (20) has an internal memory clock portion.In accordance with the present invention, a static random access memory block (20) incorporates at least one adder (28) for adding input data input through a data inlet (26), and at least one adder (28) is It is disposed between the data entrance (26) and the read / write module (24).Thus, the read process and the write process can be optimized, and thus the current consumption can be reduced.The present invention further relates to a receiving sensor for radar systems or lidar systems, including application specific integrated circuits.The particular application integrated circuit includes at least one static random access memory block (20) according to the present invention.
机译:本发明包括存储单元阵列(21),行地址解码器(22),列数据多路复用器(23),包括读放大器和写驱动器的读写模块(24),以及控制逻辑单元( 25);本发明涉及一种用于接收传感器的静态随机存取存储器块(20),包括数据入口(26)和数据出口(27)。静态随机存取存储器块(20)具有内部存储器时钟部分。根据本发明,静态随机存取存储器块(20)包括至少一个加法器(28),用于添加通过数据入口(26)输入的输入数据,并且至少一个加法器(28)是设置在数据入口之间(26)和读/写模块(24).thus,读取过程和写入过程可以优化,因此可以减少电流消耗。本发明还涉及用于雷达系统或潮汐系统的接收传感器,包括应用特定集成电路。特定应用集成电路包括根据本发明的至少一个静态随机存取存储器块(20)。

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