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MITIGATING THERMAL IMPACTS ON ADJACENT STACKED SEMICONDUCTOR DEVICES

机译:缓解对相邻堆叠半导体器件的热冲击

摘要

A semiconductor device assembly and associated methods are disclosed herein. The semiconductor device assembly includes (1) a substrate having a first side and a second side opposite the first side; (2) a first set of stacked semiconductor devices at the first side of the substrate; (3) a second set of stacked semiconductor devices adjacent to one side of the first set of stacked semiconductor devices; (4) a third set of stacked semiconductor devices adjacent to an opposite side of the first set of stacked semiconductor devices; and (5) a temperature adjusting component at the second side and aligned with the second set of stacked semiconductor devices. The temperature adjusting component is positioned to absorb the thermal energy and thereby thermally isolate the second set of stacked semiconductor devices from the first set of stacked semiconductor devices.
机译:本文公开了一种半导体器件组件和相关方法。 半导体器件组件包括(1)基板,该基板具有第一侧和第一侧的第二侧; (2)基板第一侧的第一组堆叠半导体器件; (3)与第一组堆叠半导体器件的一侧相邻的第二组堆叠半导体器件; (4)第三组堆叠半导体器件,与第一组堆叠半导体器件的相对侧相邻; (5)在第二侧的温度调节部件并与第二组堆叠的半导体器件对准。 定位温度调节部件以吸收热能,从而热隔离从第一组堆叠的半导体器件中的第二组堆叠的半导体器件。

著录项

  • 公开/公告号US2021351160A1

    专利类型

  • 公开/公告日2021-11-11

    原文格式PDF

  • 申请/专利权人 MICRON TECHNOLOGY INC.;

    申请/专利号US202016871490

  • 发明设计人 SUI CHI HUANG;

    申请日2020-05-11

  • 分类号H01L25/065;

  • 国家 US

  • 入库时间 2022-08-24 22:11:01

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