A technique for providing a new field effect transistor (FET) architecture that includes a central fin region and one or more vertically stacked nanosheets. A non-planar channel zone is formed which has a first semiconductor layer (208), a second semiconductor layer (206) and a fin-shaped bridge layer between the first semiconductor layer (208) and the second semiconductor layer (206). Forming the non-planar channel region may include forming a nanolayer stack over a substrate (204), forming a trench (502) by removing a portion of the nanolayer stack, and forming a third semiconductor layer (602) in the trench (502). Outer surfaces of the first semiconductor layer (208), the second semiconductor layer (206) and the fin-shaped bridge zone define an effective channel width of the non-planar channel zone.
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