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A method of manufacturing a device comprising a PNP bipolar transistor and an NPN bipolar transistor for radio frequency applications

机译:一种制造一种用于射频应用的PNP双极晶体管和NPN双极晶体管的装置的方法

摘要

This text relates to a method of manufacturing a microelectronic device comprising a P-type doped semiconductor substrate (1) and a PNP transistor and an NPN transistor arranged vertically in said substrate (1), said method comprising the following successive steps : - formation of an insulation box (2) doped N + of the PNP transistor in the substrate (1); - formation of a region (3) doped P + in the insulation box (2); - epitaxial growth d 'a first semiconductor layer (10) on the substrate (1); - formation of an N + doped well (5) of the NPN transistor, at least a part of said well (5) extending into the first semi-layer conductive (10); - epitaxial growth of a second semiconductor layer (11) on the first semiconductor layer (10); - formation of a P-doped region (6) capable of forming the collector of the PNP transistor in the second semiconductor layer (11), in electrical connection with the region (3) doped P +; - formation of an N-doped region (7) capable of forming the collector of the NPN transistor in the second semiconductor layer (11), in electrical connection with the N + doped well (5). Figure for the abstract: Fig 10
机译:本文涉及一种制造微电子器件,其包括垂直布置在所述基片(1),所述P型掺杂的半导体衬底(1)和一个PNP晶体管和一个NPN晶体管的方法方法,包括以下连续的步骤: - 形成的绝缘盒(2)掺杂在基底(1)的PNP晶体管的N +; - 区域的形成(3)掺杂的P +中的隔热箱体(2); - 外延生长d“的基板(1)上的第一半导体层(10); - 形成一个N +掺杂阱(5)的NPN晶体管,至少所述井的一部分(5)延伸到所述第一半导电层(10); - 在第一半导体层上的第二半导体层(11)的外延生长(10); - 形成一个p掺杂的区域(6)能够在所述第二半导体层(11)在形成所述PNP晶体管的集电极,与所述区域(3)的电连接的的掺杂的P +; - 形成一个N型掺杂区域(7)能够在所述第二半导体层(11)在形成NPN晶体管的集电极的,与所述N +电连接的掺杂阱(5)。 图的简介:图10

著录项

  • 公开/公告号FR3106931A1

    专利类型

  • 公开/公告日2021-08-06

    原文格式PDF

  • 申请/专利权人 STMICROELECTRONICS (CROLLES 2) SAS;

    申请/专利号FR2000903

  • 发明设计人 JEAN JIMENEZ MARTINEZ;

    申请日2020-01-30

  • 分类号H01L21/328;H01L29/732;H01L21/20;

  • 国家 FR

  • 入库时间 2022-08-24 20:23:31

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