METHOD OF FORMING ASYMMETRIC DIFFERENTIAL SPACERS FOR OPTIMIZED MOSFET PERFORMANCE AND FOR OPTIMIZED MOSFET AND SONOS COINTEGRATION

摘要

A method of manufacturing a semiconductor device, comprising: providing a semiconductor substrate having a first region, a second region, and a third region; at the first region, providing a first thin dielectric layer; at the second region, providing a second thick dielectric layer; at the third area, providing an ONO stack; at each of the first, second and third regions, providing at least one gate structure; Performing an oxidizing step to form an oxide layer on each of the gate structures of the first, second and third regions and on exposed portions of the first and second dielectric layers; Providing a first tetraethylorthosilicate, TEOS layer over the second and third regions; blanket depositing a first silicon nitride, SiN layer over the first, second and third regions; and etching the first SiN layer, leaving at least a portion of the first SiN layer on each gate structure of the first, second and third regions to form a first SiN sidewall spacer portion on each gate structure of the first, second and third regions to form the third region, wherein at least a part of the ONO stack is protected from the etching by the first TEOS layer.